At its Advancing AI event, AMD announced 6th Gen EPYC server processors, codenamed Venice, alongside the Instinct MI400 accelerator series, a one-two aimed at both halves of the modern analytics back end.
EPYC Venice
Venice is the first x86 server CPU on a TSMC 2nm-class process, built on Zen 6. The top EPYC 9996 reaches 256 cores and 512 threads, with configurations spanning 96-core Zen 6 parts up to 256-core Zen 6c parts. Memory moves to 16 channels of 12.8 GT/s MRDIMM, I/O steps up to PCIe Gen 6, and select SKUs boost to 5 GHz. AMD claims up to 70% more performance than the prior Turin generation.
For VMS and video-database workloads, the memory and I/O jumps matter as much as the cores: recording tiers are bandwidth businesses, and PCIe Gen 6 doubles the lane budget available to NVMe and NICs.
Instinct MI400 and Helios
The MI455X carries 432GB of HBM4 and claims 34x higher token throughput than the MI355X, while the MI430X targets HPC with hardware FP64. The Helios rack pairs 72 MI455X GPUs with 18 Venice CPUs, and AMD cites roughly 30% more tokens per dollar than the leading competitive rack.
The read
Almost no security project buys a Helios rack. But the analytics services those projects consume, cloud-hosted detection, forensic search, model training, run on exactly this hardware, and a credible second supplier at rack scale puts pressure on the cost of every AI feature that ends up in a camera licence.